1. Field of the Invention
The present invention relates to a manufacturing method of a solid-state imaging device. More particularly, the present invention is concerned with a manufacturing method of a solid-state imaging device having a transistor having a silicide layer formed.
2. Description of Related Art
In related art, as solid-state imaging devices that convert image light to an electric signal as an image signal, a charge coupled device (CCD) image sensor, a metal oxide semiconductor (MOS) image sensor, and others have been known.
The MOS image sensor has, on a common substrate, a photo-detection region (photodiode) which generates charges in response to light irradiation, and a voltage conversion region which converts the charges generated by the photo-detection region to an electric signal (generally, a voltage signal). In the photo-detection region, pixel transistors (MOS transistors) are formed, and in the voltage conversion region peripheral transistors (MOS transistors) are formed.
The solid-state imaging device tends to be driven at a higher speed in recent years, and, in accordance with this tendency, there are increasing demands for the peripheral transistor having a higher driving speed. For meeting such demands and improving the operation speed of the peripheral transistor, a technique is widely used by which a silicide layer, which is a compound of Si and a high melting-point metal such as Ti, Co, or Ni is formed on the surfaces of the gate electrode, a source region, and a drain region of the peripheral transistor (for example, see Japanese Patent Application Publication No. 2005-174968).
An explanation is made below on a related art manufacturing method of a solid-state imaging device having a peripheral transistor in which a silicide layer is formed in the voltage conversion region (hereinafter, referred to as “a peripheral region”).
In a related art manufacturing method of a solid-state imaging device, first, as shown in FIG. 4A, a first silicon oxide film 104 and a silicon nitride film 105 for forming sidewalls of a peripheral transistor are formed by a low pressure chemical vapor deposition (CVD) method on the entire surface (both the pixel region and the peripheral region) so that they cover a gate electrode 103 formed on a gate oxide film 102 formed by thermal oxidation on the surface of a silicon substrate 101.
Furthermore, using a general-purpose photolithography technique, the pixel region is covered with a photoresist 106 (see FIG. 4B), and the resultant silicon substrate is subjected to dry etching in a state such that the pixel region is covered with the photoresist, forming sidewalls 107 on the sides of the gate electrode in the peripheral region (see FIG. 4C).
Subsequently, the photoresist is removed, and a second silicon oxide film 108 for forming sidewalls of a pixel transistor and a peripheral transistor is formed on the entire surface (both the pixel region and the peripheral region) by a low pressure CVD method (see FIG. 4D), followed by dry etching, forming sidewalls 107 on the sides of the gate electrodes in the pixel region and the peripheral region (see FIG. 5A).
Using a general-purpose photolithography technique, the pixel region is covered with a photoresist 106, and the resultant silicon substrate is subjected to first ion implantation (see reference character A in the figure) in a state such that the pixel region is covered with the photoresist, forming a source region and a drain region so that they surround the gate electrode in the peripheral region (see FIG. 5B). The pixel region is covered with the photoresist, and hence circumference of the gate electrode in the pixel region is not subject to the first ion implantation.
Subsequently, the photoresist covering the pixel region is removed and then, using a general-purpose photolithography technique, the peripheral region is covered with a photoresist 106, and the resultant silicon substrate is subjected to second ion implantation (see reference character B in the figure) in a state such that the peripheral region is covered with the photoresist, forming a source region and a drain region so that they surround the gate electrode in the pixel region (see FIG. 5C). The peripheral region is covered with the photoresist, and hence circumference the gate electrode in the peripheral region is not subject to the second ion implantation.
Next, using a sputtering technique, a metal film 109 (e.g., a Co film) for forming a silicide is formed on the entire surface of the silicon substrate (see FIG. 6A), and the resultant silicon substrate is subjected to predetermined thermal treatment, forming a silicide layer 110 near the surface of the gate electrode, a source region, and a drain region of the peripheral transistor (see FIG. 6B).
Subsequently, a nitride film 113 containing a large amount of hydrogen is formed on the silicide layer. The nitride film containing a large amount of hydrogen supplies hydrogen to the silicon substrate, and causes diffusion of the hydrogen through the pixel region to reduce crystal defects in the pixel region (which is considered to reduce Si dangling bonds). Such a configuration is desirable when controlling the generation of white noises.
Subsequently, an interlayer dielectric 111 is formed, and contact holes 112 are formed, thus obtaining a pixel transistor having no silicide layer formed in the photo-detection region and a peripheral transistor having a silicide layer formed in the peripheral region (see FIG. 6C). In the figure, reference numeral 113 designates a photodiode region.